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Abstract:

Behavior needs to be understood from early stages of software development. In this context, incremental and declarative modeling seems an attractive approach for closely capturing and analyzing requirements without early operational commitment. A traditional choice for such a kind of modeling is a logic-based approach. Unfortunately, in many cases, the formal description and validation of properties result in a daunting task, even for trained people. Moreover, some authors established some practical limitations with temporal logics expressive power. In this work, we present omega-feather weight visual scenarios (ω-FVS) a declarative language, not founded on temporal logics, but on simple graphical scenarios, powerful enough to express ω-regular properties. The notation is equipped with declarative semantics based on morphisms, and a tableau procedure is given enabling the possibility of automatic analysis. © 2016, Springer-Verlag London.

Registro:

Documento: Artículo
Título:Declaratively building behavior by means of scenario clauses
Autor:Asteasuain, F.; Braberman, V.
Filiación:Departamento de Computación, Facultad de Ciencias Exactas y Naturales, Universidad de Buenos Aires, Pabellon I, Ciudad Universitaria, Buenos Aires, C1428EGA, Argentina
Ing. en Informática, Departamento de Tecnología y Administración, Universidad Nacional de Avellaneda, Mario Bravo 1460, Piñeyro, Buenos Aires, 1870, Argentina
Palabras clave:Behavioral modeling; Formal Specifications; Requirements Engineering; Formal specification; Requirements engineering; Semantics; Temporal logic; Behavioral model; Declarative Languages; Declarative models; Declarative semantics; Formal Description; Logic-based approach; Operational commitments; Regular properties; Software design
Año:2017
Volumen:22
Número:2
Página de inicio:239
Página de fin:274
DOI: http://dx.doi.org/10.1007/s00766-015-0242-2
Título revista:Requirements Engineering
Título revista abreviado:Requir. Eng.
ISSN:09473602
Registro:http://digital.bl.fcen.uba.ar/collection/paper/document/paper_09473602_v22_n2_p239_Asteasuain

Referencias:

  • Alfonso, A., Braberman, V., Kicillof, N., Olivero, A., Visual timed event scenarios (2004) In: 26th ICSE’04
  • Areces, C., Hoffmann, G., Denis A (2010) Modal logics with counting 17th workshop on logic, language, information and computation, Brazil. Springer, pp. 98-109. , Berlin, Heidelberg
  • Asteasuain, F., Braberman, V., Specification patterns can be formal and also easy (2010) In: The 22nd international conference on software engineering and knowledge engineering (SEKE)
  • Autili, M., Inverardi, P., Pelliccione, P., Graphical scenarios for specifying temporal properties: an automated approach (2007) ASE, 14 (3), pp. 293-340
  • Autili, M., Pelliccione, P., Towards a graphical tool for refining user to system requirements (2008) Electronic notes in theoretical computer science (ENTCS), 211, pp. 147-157
  • Bianculli, D., Ghezzi, C., Pautasso, C., Senti, P., Specification patterns from research to industry: a case study in service-based applications (2012) In: Proceedings of the 2012 international conference on software engineering. IEEE Press
  • Bloem, R., Cavada, R., Eisner, C., Pill, I., Roveri, M., Semprini, S., Manual for property simulation and assurance tool (deliverable 1.2/4–5) (2004) In: Technical report, , PROSYD Project, Technical Report
  • Boker, U., Chatterjee, K., Henzinger, T.A., Kupferman, O., Temporal specifications with accumulative values. In: 26th annual IEEE symposium on logic in computer science (LICS) (2011) IEEE
  • Bosscher, D., Polak, I., Vaandrager F (1994) Verification of an audio control protocol Formal techniques in real-time and fault-tolerant systems. Springer, pp. 170-192. , Berlin, Heidelberg
  • Bouajjani, A., Lakhnech, Y., Yovine S (1996) Model checking for extended timed temporal logics Formal techniques in real-time and fault-tolerant systems. Springer, pp. 306-326. , Berlin, Heidelberg
  • Braberman, V., Garbervestky, D., Kicillof, N., Monteverde, D., Olivero A (2009) Speeding up model checking of timed-models by combining scenario specialization and live component analysis Formal modeling and analysis of timed systems. Springer, pp. 58-72. , Berlin, Heidelberg
  • Braberman, V., Kicillof, N., Olivero, A., A scenario-matching approach to the description and model checking of real-time properties (2005) IEEE TSE, 31 (12), pp. 1028-1041
  • Clarke, E., Grumberg, O., Peled, D., (1999) Model checking, , Springer, New York
  • Buchi online Store, , http://buchi.im.ntu.edu.tw/index.php/browse/index/
  • Cobleigh, R., Avrunin, G., Clarke, L., User guidance for creating precise and accessible property specifications (2006) In: Proceedings of the 14th ACM SIGSOFT international symposium on foundations of software engineering. ACM
  • Dalal, S., Jain, A., Karunanithi, N., Leaton, J., Lott, C., Patton, G., Horowitz, B., Model-based testing in practice (1999) In: Proceedings of the 21st international conference on software engineering. ACM
  • David, S., Orni, A., (2005) Property-by-example guide: a handbook of psl/sugar examples-prosyd deliverable d1
  • De Alfaro, L., Henzinger, T., Interface automata (2001) ACM SIGSOFT Softw Eng Notes, 26 (5), p. 120
  • Dillon, L., Kutty, G., Moser, L., Melliar-Smith, P., Ramakrishna, Y., A graphical interval logic for specifying concurrent systems (1994) ACM Trans Softw Eng Methodol (TOSEM), 3 (2), pp. 131-165
  • D’Ippolito, N., Braberman, V., Piterman, N., Uchitel, S., Synthesis of live behaviour models. In: Proceedings of the 18th ACM SIGSOFT international symposium on foundations of software engineering (2010) ACM SIGSOFT
  • Specification Patterns Web Site, , http://patterns.projects.cis.ksu.edu/documentation/patterns.shtml, Dwyer M, Avrunin G, Corbett J In
  • Dwyer, M., Avrunin, G., Corbett, J., Patterns in property specifications for finite-state verification (1999) In: Proceedings of the 21st international conference on software engineering ICSE
  • Eisner, C., Fisman, D., (2006) A practical introduction to PSL (series on integrated circuits and systems), , Springer, Secaucus
  • Fritz, C., Wilke, T., State space reductions for alternating büchi automata quotienting by simulation equivalences (2002) In: FST TCS 2002: foundations of software technology and theoretical computer science. Springer
  • Gary, M.R., Johnson, D.S., (1979) Computers and intractability: a guide to the theory of np-completeness, , Freeman and Company, San Francisco
  • Giannakopoulou, D., Magee, J., Fluent model checking for event-based systems (2003) In: Proceedings of the 9th European software engineering conference. ACM
  • Playing with time: On the specification and execution of time-enriched lscs In: MASCOTS ’02. IEEE computer society, , Harel D, Marelly R pp 193–202
  • Holzmann, G., The logic of bugs (2002) ACM Softw Eng Notes, 27 (6), p. 87
  • Konrad, S., Cheng, B., Real-time specification patterns (2005) In: Proceedings of the 27th ICSE. ACM
  • Kupferman, O., Piterman, N., Vardi, M., Extended temporal logic revisited (2001) In: CONCUR 2001 concurrency theory
  • Lamsweerde, A.V., Goal-oriented requirements engineering: a guided tour (2001) In: RE’01—international joint conference on RE
  • (1993) RFC1508: generic security service application program interface RFC Editor United States, , Linn J
  • Luckham, D., (2011) Event processing for business: organizing the real-time enterprise, , Wiley, Hoboken
  • McCarthy, J., Hayes, P., Some philosophical problems from the standpoint of artificial intelligence (1968) Stanford University
  • (2008) NET NegotiateStream Protocol Specification v2.0., , http://msdn.microsoft.com/en-us/library/cc236723.aspx, [MS-NNS] July
  • Noda, N., Kishi, T., An aspect-oriented modeling mechanism based on state diagrams (2006) In: 9th international workshop on AOM
  • Pelov, N., Denecker, M., Bruynooghe, M., Well-founded and stable semantics of logic programs with aggregates (2007) Theory Pract Logic Program, 7 (3), p. 301
  • Piterman, N., Pnueli, A., Sa’ar, Y., Synthesis of reactive (1) designs (2006) Lecture notes in computer science, 3855, p. 364
  • Pnueli, A., The temporal logic of programs (1977) In: 18th annual symposium on foundations of computer science, 1977. IEEE
  • Pnueli, A., Applications of temporal logic to the specification and verification of reactive systems: a survey of current trends (1986) Current trends in Concurrency, pp. 510-584
  • Post, A., Hoenicke, J., Formalization and analysis of real-time requirements: a feasibility study at bosch (2012) In: VSTTE
  • Post, A., Menzel, I., Hoenicke, J., Podelski, A., Automotive behavioral requirements expressed in a specification pattern system: a case study at bosch (2012) Requir Eng, 17 (1), pp. 19-33
  • Implementing protocols via declarative event patterns. (2004) In: ACM sigsoft international symposium on FSE (FSE-12)
  • Sánchez, C., Leucker, M., Regular linear temporal logic with past (2010) In: Verification, model checking, and abstract interpretation. Springer
  • Sengupta, B., Cleaveland, R., Triggered message sequence charts (2002) In: SIGSOFT FSE
  • Sibay, G., Uchitel, S., Braberman, V., Existential live sequence charts revisited (2008) In: Proceedings of ICSE. ACM New York
  • Smith, M., Holzmann, G., Etessami, K., Events and constraints: a graphical editor for capturing logic requirements of programs (2001) In: Proceedings of fifth IEEE international symposium on requirements engineering, 2001. IEEE
  • Smith, R., Avrunin, G., Clarke, L., Osterweil, L., Propel: an approach supporting property elucidation (2002) ICSE, 24, pp. 11-21
  • Somenzi, F., Bloem, R., Efficient büchi automata from ltl formulae (2000) In: Computer aided verification. Springer
  • Tsay, Y., Chen, Y., Tsai, M., Wu, K., Chan, W., Goal: A graphical tool for manipulating büchi automata and temporal formulae (2007) In: Tools and algorithms for the construction and analysis of systems
  • Tsay, Y., Tsai, M., Chang, J., Chang, Y., Büchi store: an open repository of büchi automata (2011) In: Tools and algorithms for the construction and analysis of systems pp 262–266
  • Uchitel, S., Kramer, J., Magee, J., Negative scenarios for implied scenario elicitation (2002) In: Proceedings of FSE ’02. ACM Press
  • Utting, M., Legeard, B., (2007) Practical model-based testing: a tools approach, , Morgan Kaufmann, San Francisco
  • Van Harmelen, F., Lifschitz, V., Porter, B., (2008) Handbook of knowledge representation, , 1, Elsevier Science, San Diego
  • (1994) Reasoning about infinite computations, , Vardiy M, Wolperz P
  • Veanes, M., Schulte, W., Protocol modeling with model program composition (2008) Lecture notes in computer science, 5048, p. 324
  • Wolper, P., Temporal logic can be more expressive (1983) Inf Control, 56 (1-2), pp. 72-99
  • Wolper, P., Vardi, M., Sistla, A., Reasoning about infinite computation paths (1983) In: 24th annual symposium on foundations of computer science, 1983. IEEE
  • Wu, Z., On the expressive power of qltl (2007) In: Proceedings of the 4th international conference on theoretical aspects of computing. Springer

Citas:

---------- APA ----------
Asteasuain, F. & Braberman, V. (2017) . Declaratively building behavior by means of scenario clauses. Requirements Engineering, 22(2), 239-274.
http://dx.doi.org/10.1007/s00766-015-0242-2
---------- CHICAGO ----------
Asteasuain, F., Braberman, V. "Declaratively building behavior by means of scenario clauses" . Requirements Engineering 22, no. 2 (2017) : 239-274.
http://dx.doi.org/10.1007/s00766-015-0242-2
---------- MLA ----------
Asteasuain, F., Braberman, V. "Declaratively building behavior by means of scenario clauses" . Requirements Engineering, vol. 22, no. 2, 2017, pp. 239-274.
http://dx.doi.org/10.1007/s00766-015-0242-2
---------- VANCOUVER ----------
Asteasuain, F., Braberman, V. Declaratively building behavior by means of scenario clauses. Requir. Eng. 2017;22(2):239-274.
http://dx.doi.org/10.1007/s00766-015-0242-2